Chapter 03Allocation and EscapePaid chapter

Memory Layout: Alignment, Padding, and False Sharing

Measure field layout and evaluate cache density and false sharing on the target hardware.

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What this chapter teaches

Common belief

A struct's size is the sum of its fields. Field order is a style choice. Two independent variables can't slow each other down.

What actually happens

the compiler aligns each field to its type's requirement and pads to get there, so size depends on order — and is rounded up to the struct's own alignment. Worse, the CPU moves memory in 64-byte cache lines, so two logically independent fields that share a line become a single contended unit across cores: writing one invalidates the other on every other core. That's false sharing, and it can make two non-interacting counters scale negatively. Layout is mechanics, not cosmetics.

Mechanisms covered
Field ordering can reduce padding; field access and external representation semantics still matter.
Cache-line width and placement are hardware properties. Test spacing and parallelism instead of assuming a universal padding size.
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